Detail of GM/T 0001.1-2012

Introduction of GM/T 0001.1-2012

GM/T 0001.1-2012 ZUC stream cipher algorithm--Part 1: Description of the algorithm 1 Scope This part of GM/T 0001 outlines the general structure of the ZUC Stream Cipher Algorithm. Based on this structure, the cryptographic mechanisms specified in other parts of this standard can be implemented. This part is applicable to the development, testing, and use of products related to the ZUC Stream Cipher Algorithm and can be applied to commercial applications that do not involve state secrets. 2 Normative References The following documents are essential for the application of this document. For dated references, only the dated version applies. For undated references, the latest version (including all amendments) applies. - GB/T 25069-2010 Information Security Technology Terminology 3 Terms and Definitions The terms and definitions defined in GB/T 25069-2010 and the followings apply to this document. 3.1 Bit A binary digit used in the binary number system, represented as 0 or 1. 3.2 Byte A string of bits, regarded as a unit, typically representing a character or part of a character. Note 1: For a given data processing system, the number of bits in a byte is fixed. Note 2: A byte typically consists of 8 bits. 3.3 Word A string of bits consisting of two or more bits. This part mainly uses 31-bit words and 32-bit words. 3.4 Word Representation By default, words in this part are represented in the decimal representation. When words are represented in other bases, an indicator is always added before or after the word representation. For example, the prefix "0x" indicates that the word is in the hexadecimal representation, and the subscript "2" indicates that the word is in the binary representation. 3.5 Bit Ordering This part specifies that the most significant bit (MSB) of a word is always on its leftmost side, and the least significant bit (LSB) is always on its rightmost side. 4 Symbols and Abbreviations 4.1 Operators The following operators are applicable to this document: + Arithmetic addition ab The product of integers a and b = Assignment operator mod Integer modulo operation 田 Bitwise XOR operation || String concatenation operator ∙H Extract the most significant 16 bits of a word ∙L Extract the least significant 16 bits of a word ⋘ k Circular left shift of a 32-bit word by k bits ≫k Right shift of a 32-bit word by k bits ab Element-wisely assign vector a to vector b 4.2 Symbols The following symbols are applicable to this document: s0,s1,s2, … ,s15 The sixteen 31-bit cells of the linear feedback shift register (LFSR) X0,X1,X2,X3 The four 32-bit words output from bit reorganization (BR) R1,R2 The two 32-bit memory unit variables ofthe nonlinear function F W The 32-bit word output from the nonlinear function F W1 The 32-bit word output from the modulo 232 addition of R1 and X1 W2 The 32-bit word output from the bitwise XOR ofR2 and X2 Z The 32-bit key word output at each clock of the algorithm k Initial seed key iv Initial vector di A 15-bit string constant, i = 0, 1, 2, … , 15 F Nonlinear function L Output key word length

Contents of GM/T 0001.1-2012